Design of Low Complexity Conservative Testable Gate Using Quantum-Dot Cellular Automata
Consideration faults and fault tolerance become important in physical realization of the circuits. In this paper, a
new designofuniversal testable parity preserving QCA logic (t-QCA) is presented. Parity preserving circuits would be ideal
for fault detection, since here the parity of the inputs is the same as the parity of the outputs. Hence, if there is a fault on any
single output, the parity should be flipped which would make the fault easy to detect.The t-QCA is able to detect permanent
and transient faults at the same time. The proposed design can be realized in error detection and correction circuits with significant
improvements. The new design of t-QCA parity conservative gate is considerably declined in terms of cell numbers,
occupied area and its delay is kept at minimum in comparison with the other previous circuits.
Keywords: Nanotechnology, Quantum-Dot Cellular Automata ,Fault Detection, TestableGate, Conservative Logic.