International Journal of Advance Computational Engineering and Networking (IJACEN)
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Statistics report
Oct. 2019
Submitted Papers : 80
Accepted Papers : 10
Rejected Papers : 70
Acc. Perc : 12%
Issue Published : 79
Paper Published : 1191
No. of Authors : 2992
  Journal Paper

Paper Title
Design of Low Complexity Conservative Testable Gate Using Quantum-Dot Cellular Automata

Abstract
Consideration faults and fault tolerance become important in physical realization of the circuits. In this paper, a new designofuniversal testable parity preserving QCA logic (t-QCA) is presented. Parity preserving circuits would be ideal for fault detection, since here the parity of the inputs is the same as the parity of the outputs. Hence, if there is a fault on any single output, the parity should be flipped which would make the fault easy to detect.The t-QCA is able to detect permanent and transient faults at the same time. The proposed design can be realized in error detection and correction circuits with significant improvements. The new design of t-QCA parity conservative gate is considerably declined in terms of cell numbers, occupied area and its delay is kept at minimum in comparison with the other previous circuits. Keywords: Nanotechnology, Quantum-Dot Cellular Automata ,Fault Detection, TestableGate, Conservative Logic.


Author - Sarvarbek Erniyazov, Young-Won You, Jun-Cheol Jeon

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| Published on 2017-09-08
   
   
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