Fpga Implementation Of Efficient Correlator For Ofdm Synchronization
Orthogonal frequency division multiplexing (OFDM) is a viable technology for high-speed data transmission by
virtue of its spectral efficiency and robustness to multi-path fading. These advantages can be achieved only with good
synchronization both in time and frequency. The existing system consist of pipeline structure of correlator using DSP48E1
slices but it optimize a large amount of area and also it forms a delay so for reducing this problems we proposed a new
model. The proposed model is designed using a custom designed hardware instead of DSP slices. So this reduces area
optimization, delay formation, power consumption and also it can be used in any FPGA architecture.
Index terms – Correlator, Field programmable gate arrays (FPGA), IEEE 802.16 standards, Orthogonal frequency division