A 14-Bit 100mhz Current-Steering DAC With Randomized Thermometer-Coding Technique, Return-To-Zero Circuit And Hybrid Layout Scheme
The design of a low-cost high-speed current-steering digital-to-analog converter (DAC) is presented. On the
architecture level, the randomized thermometer-coding (RTC), which offers consecutive selection, randomization, and less
element switching activity, is used. Therefore, harmonic distortion caused by element mismatches can be significantly
suppressed. On the circuit level, a return-to-zero (RTZ) circuit, which can isolate the DAC output nodes from the coupling of
the control signals without sacrificing speed, is adopted. On the layout level, a novel hybrid layout scheme (HLS) is proposed.
This scheme can compromise the quadratic and linear error distribution of systematic element-mismatch. Using the above
three techniques, a 14-bit 100-MHz current-steering DAC is implemented in a 1P6M 0.18-μm 1.8-V CMOS process. The
measured spurious-free dynamic range (SFDR) is higher than 80.1dB at a 100MHz sampling frequency. The measurement
results show that the RTC technique improves the SFDR by more than 16dB and the RTZ circuit prevents a 15dB SFDR drop
when the input signal frequency is close to half the sampling frequency. The low-cost DAC has an active area of less than
Index Terms— Digital-to-Analog Converter, Randomization, Return-To-Zero, Layout Scheme.