Comparison Study of 1- Bit Full Adder Design Using Different Technologies
The adder is an important unit in any processor and controller circuit. There are so many full adder circuits
which have been proposed and designed. In this proposed work a 1-bit hybrid full adder circuit using Complementary Pass
Transistor Logic and Transmission Gate Logic is designed and then compared with the existing designs such as C-CMOS,
CPL,24-T full adder, TGL, Transmission Function Adder and hybrid full adder using C-CMOS and TGL logic designs.
Comparative descriptions of various parameters like propagation delay, power consumption and Power Delay Product have
The result shows that delay is reduced by 68.037%, average power reduced by 18.90% and PDP is reduced by 12.84%.
Keywords— XOR gate, Transmission Function Adder, Complementary CMOS.