Implementation Of Adaptive Clock Gating Technique For Low Power Circuits: A Review
Abstract: Clock pulses are responsible for over 50% of dynamic power consumption in a synchronous circuit. Clock Gating
is being used for reduction of power consumption in low power circuits for quite a while now. Adaptive clock gating is most
rigorous of them all. Since gating the clock signals involve additional circuitry there exists a tradeoff between the additional
number of gates and the total power consumption of gated clock. In this paper we go through the details of adaptive clock
gating technique and the parameters which are to be taken into account while deciding the gating circuitry.