Paper Title :Compiler Synthesis of Multiply Accumulate (MAC) Instructions Using LLVM Backend

Author :Shih-Yi Yuan, Wei-Ting Chen

Article Citation :Shih-Yi Yuan ,Wei-Ting Chen , (2024 ) " Compiler Synthesis of Multiply Accumulate (MAC) Instructions Using LLVM Backend " , International Journal of Electrical, Electronics and Data Communication (IJEEDC) , pp. 30-34, Volume-12,Issue-4

Abstract : Multiply Accumulate (MAC) instruction can improve computation speed, especially in operations such as matrix calculations. FPGA-based soft-IP (intellectual property) design such as CPU-IP can be more flexible for special purpose application scenarios. Our laboratory has designed various FPGA-based CPU designs with/without MAC supports. Since this hardware features cannot be directly represented by high-level languages, such as C/C++, a new compiler synthesized for such CPU becomes a must. The authors have chosen LLVM framework to develop the compiler.This approach can help designers automatically generate or synthesis various compilersfor different CPU architectures with/without MAC. Users are relieved from intensive knowledge of the intricate prerequisites compiler synthesis for adapting MAC instruction supports. After understanding the hardware MAC support mechanism, CPU designers can run the proposed tool to synthesizea MAC-instruction-supporting compiler. After the modified compiler is synthesized, the process can be integrated to the FPGA-based CPU design flowto speed up HW/SW-co-designs. This tool enables users to automate the design process without manually adaptingcompiler for FPGA-based CPU design flow. Keywords - LLVM，CPU0，Automated Program

Type : Research paper

Published : Volume-12,Issue-4

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