Paper Title :Mitigation of Self-Heating Effects in Under lap Soi Mosfet in Nano Regime

Author :Vinod Kumar, Ashwani Kumar

Article Citation :Vinod Kumar ,Ashwani Kumar , (2024 ) " Mitigation of Self-Heating Effects in Under lap Soi Mosfet in Nano Regime " , International Journal of Electrical, Electronics and Data Communication (IJEEDC) , pp. 15-24, Volume-12,Issue-4

Abstract : With the advancement of VLSI devices in nano regime, SOI MOSFET structure is affected by self-heating and self-heating leads to mobility degradation, poor reliability, poor short channel effects, and degraded signal delays due to increase of device lattice temperature. In this work, underlap SOI MOSFET structure with SELBOX (Selective Buried Oxide) gap is investigated for self-heating effects using TCAD simulation by focusing on the effect of variation of buried oxide thickness, spacer length thickness, thin film thickness, channel doping, supply voltage and selective buried oxide gap length. It is observed that thermal resistance has been found to reduce by a factor of square root upon doubling the size of silicon film thickness, on reducing the thickness of box oxide it decreases linearly, however not much change in the thermal resistance of the device was seen on variations in spacer thickness and channel doping of underlap fully depleted SOI MOSFET. Further, a thermal aware underlap SOI MOSFET structure with SELBOX (Selective Buried Oxide) gap of various high thermal conductive materials is proposed to mitigate the self-heating effects. High-k gate dielectric has also been used in underlap SOI with SELBOX gap to suppress excessive transistor gate leakage and power consumption prevalent in nano domain. Underlap fully depleted SOI MOSFET has been analysed comprehensively for self-heating parameters such as lattice temperature, thermal resistance, maximum temperature cost factor, breakdown voltage and Zero Temperature Coefficient, using SELBOX (Selective Buried Oxide) gap engineering with thermal conductive materials like Silicon, Polysilicon, Silicon Carbide, Aluminium Nitride, and Diamond. It is observed that underlap selective buried oxide with Aluminium nitride is not only suitable to mitigate self-heating effects but also improve performance of the device. Keywords - SOI (Silicon on Insulator), SHE (Self heating effects), Thermal Resistance, Lattice Temperature, SELBOX (Selective Buried Oxide), Zero temperature Coefficient (ZTC)

Type : Research paper

Published : Volume-12,Issue-4

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