International Journal of Electrical, Electronics and Data Communication (IJEEDC)
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Volume-12,Issue-1  ( Jan, 2024 )
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Statistics report
Apr. 2024
Submitted Papers : 80
Accepted Papers : 10
Rejected Papers : 70
Acc. Perc : 12%
Issue Published : 133
Paper Published : 1712
No. of Authors : 4737
  Journal Paper


Paper Title :
FPGA Implementation of Novel S-Box, Mixcolumn and Addround Key Based Advanced Encryption System

Author :Sapnakumaric, K.V.Prasad

Article Citation :Sapnakumaric ,K.V.Prasad , (2020 ) " FPGA Implementation of Novel S-Box, Mixcolumn and Addround Key Based Advanced Encryption System " , International Journal of Electrical, Electronics and Data Communication (IJEEDC) , pp. 23-26, Volume-8,Issue-7

Abstract : For every Communication system, security is very important to transmitting and receiving of video, audio and image. The research work is to develop a novel approach of AES algorithm and its FPGA implementation. Individual modules of AES are designed using novel techniques such as Elliptic Curve Cryptography (ECC) and Bitwise Matrix Code (BWMC) as well as Stellar Matrix (SM) to optimize various parameters. The paper presents the results of FPGA implementation of novel approach AES. Keywords - AES, ECC, BWMC, BEDT, SM, LUT, FPGA

Type : Research paper

Published : Volume-8,Issue-7


DOIONLINE NO - IJEEDC-IRAJ-DOIONLINE-17322   View Here

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