International Journal of Electrical, Electronics and Data Communication (IJEEDC)
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Statistics report
Apr. 2024
Submitted Papers : 80
Accepted Papers : 10
Rejected Papers : 70
Acc. Perc : 12%
Issue Published : 133
Paper Published : 1712
No. of Authors : 4737
  Journal Paper


Paper Title :
Performance Analysis of Box Engineered Single and Double Gate FDSOI MOSFET

Author :Guru Charan, Vinod Kumar

Article Citation :Guru Charan ,Vinod Kumar , (2022 ) " Performance Analysis of Box Engineered Single and Double Gate FDSOI MOSFET " , International Journal of Electrical, Electronics and Data Communication (IJEEDC) , pp. 46-55, Volume-10,Issue-6

Abstract : Abstract - In the modern era of VLSI Design, continuous advancement in the process technology has led to the significant reduction in the feature size of semiconductor devices. In this paper, Single Gate Fully Depleted Silicon on Insulator (SGFDSOI) and Double Gate Fully Depleted Silicon ON Insulator (DGFDSOI) MOSFET at 14nm technology have been analysed. ATLAS package of the SILVACO tool is used for the simulations. Further in this work, effect of variation in channel doping, substrate doping, source/drain doping and work function on the single gate and double gate FDSOI MOSFETs with different Gate Oxides (SiO2, HfO2, Si3N4 and Al2O3) are analysed. Also, the devices are subjected to BOX engineering. Simulations of different values of subthreshold values, threshold voltage (VT), ON current (ION), OFF current (IOFF) and transfer characteristics are also analysed. Effect of short channel effects and Drain Induced Barrier Lowering (DIBL) for different structures are evaluated for comparative analysis. All the structures are simulated for single and double gate FDSOI in nanometer regime. It has been found that double gate FDSOI shows a high ON current (ION) and better performance as compared to the single gate FDSOI. To analyse the performance of the devices, Concentration dependent mobility (CONMOB), Lateral electric field dependent model (FLDMOB), Shockley-Read-Hall recombination (SRH), Band gap narrowing (BGN) and AUGER are used. Keywords - SOI, FDSOI, SGFDSOI, DGFDSOI, MOSFET, ON, OFF, BOX, ION, IOFF, VT

Type : Research paper

Published : Volume-10,Issue-6


DOIONLINE NO - IJEEDC-IRAJ-DOIONLINE-18755   View Here

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