International Journal of Electrical, Electronics and Data Communication (IJEEDC)
eISSN:2320-2084 , pISSN:2321-2950
current issue
Volume-8,Issue-5  ( May, 2020 )
  1. Volume-8,Issue-4  ( Apr, 2020 )
  2. Volume-8,Issue-3  ( Mar, 2020 )
  3. Volume-8,Issue-2  ( Feb, 2020 )

Statistics report
Aug. 2020
Submitted Papers : 80
Accepted Papers : 10
Rejected Papers : 70
Acc. Perc : 12%
Issue Published : 89
Paper Published : 1423
No. of Authors : 3841
  Journal Paper

Paper Title
Implementation Of Reconfigurable Processing Elements For Image Processing Application

Reconfigurable embedded processors are a special class of processors comprising an extended instruction set that is implemented using a reconfigurable fabric. The instruction -set extension is typically appl ication speci fic, but i t is not required to finalize i t when designing the processor. The reconfigurable fabric consist of processing elements (PE) allows that the accelerators that are used to implement the instruction -set may be reconfigured during design time wi thout affecting the functionali ty of the working processor. This paper presents the technique to reconfigure using PE for digi tal image processing (DIP) application. We have tried to implement i t for image segmentation . Keywords-Reconfigurable Processor (RP), Reconfigurable Processing element (PE), Image segmentation, FPGA.

Author - Manisha p. Khorgade
DOI - 10.18479/ijeedc/2015/v3i7/48261

| PDF |
Viewed - 93
| Published on 2015-07-04
IRAJ Other Journals
IJEEDC updates
Volume-8,Issue-1(Jan,2020) Want to join us ? CLick here
The Conference World



Technical Editor, IJEEDC
Department of Journal and Publication
Plot no. 30, Dharma Vihar,
Khandagiri, Bhubaneswar, Odisha, India, 751030
Mob/Whatsapp: +91-9040435740