International Journal of Electrical, Electronics and Data Communication (IJEEDC)
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Dec. 2022
Submitted Papers : 80
Accepted Papers : 10
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Acc. Perc : 12%
Issue Published : 116
Paper Published : 1605
No. of Authors : 4403
  Journal Paper


Paper Title :
FPGA Based Chirp Generator Using Memory Based Technique

Author :Ravikanth Pamidi, Suma K V

Article Citation :Ravikanth Pamidi ,Suma K V , (2016 ) " FPGA Based Chirp Generator Using Memory Based Technique " , International Journal of Electrical, Electronics and Data Communication (IJEEDC) , pp. 8-11, Volume-4,Issue-7

Abstract : The following content describe the generation of chirp signal using Memory Based Technology. The required parameters to generate chirp signal are received by the system through RS-232 serial communication protocol. Based on the input parameters FPGA generate the Chirp signal matches the input parameters. Keywords— FPGA, Chirp Signal, Memory Based Technique.

Type : Research paper

Published : Volume-4,Issue-7


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