International Journal of Electrical, Electronics and Data Communication (IJEEDC)
eISSN:2320-2084 , pISSN:2321-2950
current issue
Volume-8,Issue-5  ( May, 2020 )
  1. Volume-8,Issue-4  ( Apr, 2020 )
  2. Volume-8,Issue-3  ( Mar, 2020 )
  3. Volume-8,Issue-2  ( Feb, 2020 )

Statistics report
Aug. 2020
Submitted Papers : 80
Accepted Papers : 10
Rejected Papers : 70
Acc. Perc : 12%
Issue Published : 89
Paper Published : 1423
No. of Authors : 3841
  Journal Paper

Paper Title
Modelling And Analysis Of Solid State Fault Current Limiter

Abstract- In modern power system, an increase in the growth of electrical energy demand is inevitable resulting in a corresponding increase in the short circuit in the power system. For this, Fault Current Limiter (FCL) became best option to reduce circuit breakers rated capacity and may limit the electromagnetic stress in associated equipment’s. In this paper modelling of solid state fault current limiter (SSFCL) under various fault conditions are carried out. The proposed SSFCL is implemented on 11 KV feeders. The performance of proposed SSFCL is evaluated in the forms of fault current. The simulation results reveal the applicability of SSFCL. The evaluation is done on MATLAB/Simulink.

Author - J.P.Sharma, Vibhor Chauhan, Hr Kamath

| PDF |
Viewed - 77
| Published on 2014-06-04
IRAJ Other Journals
IJEEDC updates
Volume-8,Issue-1(Jan,2020) Want to join us ? CLick here
The Conference World



Technical Editor, IJEEDC
Department of Journal and Publication
Plot no. 30, Dharma Vihar,
Khandagiri, Bhubaneswar, Odisha, India, 751030
Mob/Whatsapp: +91-9040435740