Paper Title
Design Of 2x2 Bit Cube In Different Low Power Techniques For Portable Devices

Power consumption plays a dominant role in the present day VLSI design technology. The demand for low power consuming devices is increasing rapidly. The power consumption of the electronic devices can be reduced by adopting different design styles. Adiabatic logic style is said to be an attractive solution for such low power electronic applications. This paper presents an energy efficient technique for 2x2 bit cubing in different adiabatic logic styles. The proposed technique has less power dissipation compared to the conventional CMOS design style. The simulation results indicate that the proposed technique is advantageous in many of the low power digital applications.