IJEEDC Designing of Cross Talk Noise Avoidance in VLSI Circuits by using Advanced Test Adaptive Shielding Method in Xilinx Tool

Journal Paper

Paper Title :Designing of Cross Talk Noise Avoidance in VLSI Circuits by using Advanced Test Adaptive Shielding Method in Xilinx Tool

Author :Shaik.Suhana, Challa.Swetha, Guthi.Venkata Bhumika, T.Manivannan

Article Citation :Shaik.Suhana ,Challa.Swetha ,Guthi.Venkata Bhumika ,T.Manivannan , (2023 ) " Designing of Cross Talk Noise Avoidance in VLSI Circuits by using Advanced Test Adaptive Shielding Method in Xilinx Tool " , International Journal of Electrical, Electronics and Data Communication (IJEEDC) , pp. 38-41, Volume-11,Issue-5

Abstract : Crosstalk noise, which is present in VLSI circuits because of the electromagnetic coupling between wires, has a negative impact on the performance of the VLSI circuits. As a result, interconnect testing becomes a crucial problem in responsibility analysis that adds to hardware and space overhead. In order to boost testing difficulties and also to reduce crosstalk noise, we have a tendency to provide a completely novel approach in this project that we have a tendency to discuss using advanced Test Adaptive Shielding (TAS). The purpose of the test at TAS's construction is to improve circuit performance by inserting changed shield lines. The test data gear under development is intelligent enough to prevent aggregation across crosstalk victim lines. On top of that, the TAS test approach optimizes power usage, complexity, fault occurrence, and fault detection. The anticipated method will be implemented in ASIC, VERILOG HDL in Xilinx software Keywords - VLSI, Crosstalk Noise, Test Adaptive Shielding, Shield Lines, Power, Verilog.

Type : Research paper

Published : Volume-11,Issue-5


	\|		PDF	\|	Viewed - 42	\|	Published on 2023-08-24

Dec. 2024
Submitted Papers	:	80
Accepted Papers	:	10
Rejected Papers	:	70
Acc. Perc	:	12%
Issue Published	:	140
Paper Published	:	1764
No. of Authors	:	4906

Published : Volume-11,Issue-5

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