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Paper Title :
FPGA Based High Speed Data Acquisition System With Ethernet Interface

Author :Suma G S

Article Citation :Suma G S , (2014 ) " FPGA Based High Speed Data Acquisition System With Ethernet Interface " , International Journal of Advances in Science, Engineering and Technology(IJASEAT) , pp. 99-102, Volume-2,Issue-3

Abstract : -To develop FPGA based 16 channel high speed Data Acquisition System with Ethernet interface is the objective of this paper. PQFP208 APA300 FPGA of ProASIC family belongs to Altera is used for this Data Acquisition System. The input data is acquired through 16 channels Analog Multiplexer is given to Analog to Digital converter. The digital data is stored in the buffer. The further processing is done by the 16 bit processor implemented in the FPGA by using VHDL. The IDE tool libero 9.1v is used for the implementation of the processor. The input control unit and the 16 bit processor is used to set up and initialize the input data source, Ethernet controller and data flow from the memory to the Network Interface. With FPGA as the platform we are getting the advantages of flexibility, programmability, low power consumption etc. The electrical isolation is one of the important requirements DAQ System, which is the main advantage that can be obtained with Ethernet interface. If multiple DAQ units are using, then synchronization is also an important need. To get the same the Precision Clock Synchronization Protocol (PTP/IEEE 1588) is used.

Type : Research paper

Published : Volume-2,Issue-3


DOIONLINE NO - IJASEAT-IRAJ-DOIONLINE-1058   View Here

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